Methods of packing user logical RAM into dedicated RAM blocks and dual-use logic/RAM blocks
US7493585B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 13, 2006 |
| Grant date | Feb 17, 2009 |
| Priority date | — |
| Expiry date | Jun 1, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/34
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for technology mapping user logical RAM on a programmable logic device is provided. The method preferably includes clustering non-RAM functional block types in the programmable logic device. Following synthesis of a user design, the method then includes determining the number of physical RAM locations available on the selected device. Also, the method includes determining the number of physical RAM locations available in the PLD and the number of Look-Up-Table (LUT) RAM locations available in the PLD. Finally, the method includes determining a combination of physical RAM locations and LUT RAM locations for implementation of the user logical RAM. The combination preferably represents a beneficial combination of physical RAM and LUT RAM with respect to a predetermined metric.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.