Method for producing vertical bipolar transistors and integrated circuit
US7495312B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 30, 2005 |
| Grant date | Feb 24, 2009 |
| Priority date | — |
| Expiry date | Nov 20, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/201
Abstract
A method for producing vertical bipolar transistors having different voltage breakdown and high-frequency performance characteristics on a single die comprises forming, for each of the vertical bipolar transistors, a buried collector region, and base and emitter regions above the buried collector region. The lateral extensions and locations of the base and emitter regions and of the buried collector region are, for each of the vertical bipolar transistors, selected to create an overlap between the base and emitter regions, and the buried collector region, as seen from above, wherein at least some of the overlaps are selected to be different.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.