Circuit and a method of determining the resistive state of a resistive memory cell
US7495971B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 19, 2006 |
| Grant date | Feb 24, 2009 |
| Priority date | — |
| Expiry date | Feb 1, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2013/0054
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and a circuit are disclosed for determining the resistive state of a resistive memory cell being read. The method includes determining the resistive state of the memory cell being read by comparing a current dependent on the resistive state of the memory cell being read with a reference current that can be dependent on a resistive state of at least one reference resistive memory cell. A read circuit can be constructed to compare the two currents. The resistive state of the memory cell being read is indicative of the data bit stored by the memory cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.