Patent · US Active

Scan line to block re-ordering buffer for image compression

US7496235B2 · kind B2 · utility

1Cited by
4References
16Claims
0Family size

Assignee

Inventor

Key dates

Filing dateAug 3, 2005
Grant dateFeb 24, 2009
Priority date
Expiry dateMay 17, 2027

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH04N19/60
  • WIPO fieldAudio-visual technology
  • WIPO sectorElectrical engineering

Abstract

A re-order buffer memory in a real-time application such as e.g., an imager. Initially, input data is written into the re-order buffer using a first addressing mode, which causes the data to be stored in a line-by-line manner. Prior to receiving the last line of input data, the stored data is read-out in blocks of data that spans multiples lines in the buffer. This frees up space in the re-order buffer. Subsequently received input data is written into the re-order buffer using a second addressing mode, which stores the newly received data in vertical segments of the re-order buffer whose stored data has already been read-out. Writing/reading of the re-order buffer alternates between the first and second addressing modes. Using this technique, a single buffer may be used to input new data while existing data is being read-out.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.