Independently controlled, double gate nanowire memory cell with self-aligned contacts

US7498211B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Ibrahim Ban · Beaverton, US
• Peter L. D. Chang · Portland, US

Key dates

• Filing date: Dec 28, 2005
• Grant date: Mar 3, 2009
• Expiry date: Apr 9, 2027

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/117

Abstract

A doubled gate, dynamic storage device and method of fabrication are disclosed. A back (bias gate) surrounds three sides of a semiconductor body with a front gate disposed on the remaining surface. Two different gate insulators and gate materials may be used.