Manufacturing method of semiconductor integrated circuit device
US7501300B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 29, 2006 |
| Grant date | Mar 10, 2009 |
| Priority date | — |
| Expiry date | Apr 5, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/78
- WIPO fieldMachine tools
- WIPO sectorMechanical engineering
Abstract
The technology in which lowering of the manufacturing yield of the semiconductor products resulting from contamination impurities can be suppressed is offered. When reducing the thickness of a semiconductor wafer, so that a crushing layer which is relatively thin and has gettering function of, for example, less than 0.5 □m, less than 0.3 □m or less than 0.1 □m in thickness may be formed at the back surface, and the die strength after making the semiconductor wafer into chips by dividing or almost dividing may be secured, the back surface of the semiconductor wafer is ground by the diamond wheel which held the diamond abrasive of, for example, fineness number #5000 to #20000 with vitrified cement B1 which has countless bubbles and impregnated synthetic-resin B2 which has viscosity in the countless bubbles.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.