Patent · US Expired

Advanced CMOS using super steep retrograde wells

US7501324B2 · kind B2 · utility

119Cited by
9References
9Claims
0Family size

Assignee

Inventors

Key dates

Filing dateApr 27, 2006
Grant dateMar 10, 2009
Priority date
Expiry dateApr 27, 2026

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D62/60
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

The present invention is a method for forming super steep doping profiles in MOS transistor structures. The method comprises forming a carbon containing layer (110) beneath the gate dielectric (50) and source and drain regions (80) of a MOS transistor. The carbon containing layer (110) will prevent the diffusion of dopants into the region (40) directly beneath the gate dielectric layer (50).

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.