Selective silicide formation by electrodeposit displacement reaction
US7501345B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 28, 2008 |
| Grant date | Mar 10, 2009 |
| Priority date | — |
| Expiry date | Mar 28, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/288
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
Silicide formation processes are disclosed that use an electrochemical displacement reaction in the absence of an externally applied current or potential. In an embodiment, a method for forming an integrated circuit comprises: depositing a metallic material upon select areas of a semiconductor topography comprising silicon by contacting the semiconductor topography with an aqueous solution comprising an acid and a metal salt to cause an electrochemical displacement reaction in the absence of an externally applied current or potential, wherein a concentration of the metal salt in the aqueous solution is about 0.01 millimolar to about 0.5 millimolar; and annealing the metallic material to form a silicide upon the areas of the semiconductor topography comprising the silicon.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.