Home node aware replacement policy for caches in a multiprocessor system
US7502889B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 30, 2005 |
| Grant date | Mar 10, 2009 |
| Priority date | — |
| Expiry date | Jan 27, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/2542
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A home node aware replacement policy for a cache chooses to evict lines which belong to local memory over lines which belong to remote memory, reducing the average transaction cost of incorrect cache line replacements. With each entry, the cache stores a t-bit cost metric (t≧1) representing a relative distance between said cache and an originating memory for the respective cache entry. Responsive to determining that no cache entry corresponds to an access request, the replacement policy selects a cache entry for eviction from the cache based at least in part on the t-bit cost metric. The selected cache entry is then evicted from the cache.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.