Krishnakanth V. Sistla
115Patents
8h-index
186Co-inventors
83Inventor score
Filing activity: Nov 30, 2004 → Jul 5, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7644293B2 | Method and apparatus for dynamically controlling power management in a distributed system | Emerging Cross-Sectional Technologies | 22 | Active |
| US9069555B2 | Managing power consumption in a multi-core processor | Emerging Cross-Sectional Technologies | 15 | Active |
| US7502889B2 | Home node aware replacement policy for caches in a multiprocessor system | Physics | 14 | Active |
| US7827425B2 | Method and apparatus to dynamically adjust resource power usage in a distributed system | Emerging Cross-Sectional Technologies | 13 | Active |
| US9547027B2 | Dynamically measuring power consumption in a processor | Emerging Cross-Sectional Technologies | 9 | Active |
| US7971074B2 | Method, system, and apparatus for a core activity detector to facilitate dynamic power management in a distributed system | Emerging Cross-Sectional Technologies | 9 | Active |
| US9075614B2 | Managing power consumption in a multi-core processor | Emerging Cross-Sectional Technologies | 8 | Active |
| US9141166B2 | Method, apparatus, and system for energy efficiency and energy conservation including dynamic control of energy consumption in power domains | Physics | 8 | Active |
| US10795853B2 | Multiple dies hardware processors and methods | Emerging Cross-Sectional Technologies | 8 | Active |
| US8169850B2 | Forming multiprocessor systems using dual processors | Physics | 7 | Active |
| US9910470B2 | Controlling telemetry data communication in a processor | Emerging Cross-Sectional Technologies | 7 | Active |
| US7730264B1 | Adaptively reducing memory latency in a system | Physics | 6 | Active |
| US9087146B2 | Wear-out equalization techniques for multiple functional units | Physics | 6 | Active |
| US11301298B2 | Apparatus and method for dynamic control of microprocessor configuration | Emerging Cross-Sectional Technologies | 5 | Active |
| US9710041B2 | Masking a power state of a core of a processor | Emerging Cross-Sectional Technologies | 5 | Active |
| US7689778B2 | Preventing system snoop and cross-snoop conflicts | Physics | 5 | Active |
| US11169560B2 | Configuration of base clock frequency of processor based on usage parameters | Emerging Cross-Sectional Technologies | 4 | Active |
| US7360008B2 | Enforcing global ordering through a caching bridge in a multicore multiprocessor system | Physics | 4 | Expired |
| US9842082B2 | Dynamically updating logical identifiers of cores of a processor | Emerging Cross-Sectional Technologies | 4 | Active |
| US9495001B2 | Forcing core low power states in a processor | Emerging Cross-Sectional Technologies | 4 | Active |
| US8473766B2 | Optimizing power usage by processor cores based on architectural events | Emerging Cross-Sectional Technologies | 4 | Active |
| US7590805B2 | Monitor implementation in a multicore processor with inclusive LLC | Physics | 4 | Expired |
| US9037840B2 | Mechanism to provide workload and configuration-aware deterministic performance for microprocessors | Emerging Cross-Sectional Technologies | 4 | Active |
| US7827357B2 | Providing an inclusive shared cache among multiple core-cache clusters | Physics | 4 | Active |
| US9501129B2 | Dynamically adjusting power of non-core processor circuitry including buffer circuitry | Emerging Cross-Sectional Technologies | 4 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.