Method and system for data dependent performance increment and power reduction
US7502918B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 28, 2008 |
| Grant date | Mar 10, 2009 |
| Priority date | — |
| Expiry date | Mar 28, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/384
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of dispatching instructions includes dispatching original instructions into an instruction buffer, including at least one operand, renaming the operand, selecting the original instructions from the instruction buffer, sending selected instructions with explicit bits, to an internal operation code exchange table, which includes replacement rules for replacing the selected instructions with a simplified instruction based on the original instructions and the explicit bits, replacing the selected instructions with the simplified instruction in accordance with the explicit bits, and issuing the simplified instructions to an execution unit by sending the simplified instruction and all explicit bits for the operands to a content addressable memory address logic of the internal operation code exchange table, wherein if a bitvector, consisting of the original instruction and the explicit bits, matches a pattern stored in the internal operation code exchange table, the original instruction is replaced by the simplified instruction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.