Data output circuit of semiconductor memory apparatus and method of controlling the same
US7505351B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 28, 2006 |
| Grant date | Mar 17, 2009 |
| Priority date | — |
| Expiry date | May 9, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/108
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The data output circuit for a semiconductor memory apparatus includes a plurality of pads in which a range of use is determined such that the respective pads are used exclusively in each of at least two kinds of unit data output modes or used commonly in all of the at least two kinds of unit data output modes, a plurality of data lines that transmit data from a plurality of memory banks to the outside of the memory banks, and a data output control unit that outputs data from a data line among the plurality of data lines, according to at least one control signal, to a signal line corresponding to a pad used in a currently set unit data output mode among the plurality of pads.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.