Patent · US Active

Apparatus and methods for predicting and/or calibrating memory yields

US7506282B2 · kind B2 · utility

4Cited by
4References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 18, 2005
Grant dateMar 17, 2009
Priority date
Expiry dateAug 5, 2026

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F30/367
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

An apparatus and methods for predicting and/or for calibrating memory yields due to process defects and/or device variations, including determining a model of a memory cell, identifying a subset of parameters associated with the model, determining and executing a refined model using the parameters, determining a predicted probability the simulated memory cell will be operational based on the simulated operation of the refined model, determining yield prediction information from the predicted probability, and determining the minimum number of repair elements to include in a memory array design to insure a desired yield percentage based on the yield prediction information.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.