George Paulik
26Patents
4h-index
28Co-inventors
59Inventor score
Filing activity: Aug 18, 2005 → Mar 6, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US10037792B1 | Optimizing data approximation analysis using low power circuitry | Physics | 10 | Active |
| US10043568B1 | Optimizing data approximation analysis using low power circuitry | Physics | 10 | Active |
| US8780604B2 | State sensing system for eFuse memory | Physics | 5 | Active |
| US7506282B2 | Apparatus and methods for predicting and/or calibrating memory yields | Physics | 4 | Active |
| US10224089B2 | Optimizing data approximation analysis using low bower circuitry | Physics | 3 | Active |
| US10598710B2 | Cognitive analysis using applied analog circuits | Physics | 3 | Active |
| US10236050B2 | Optimizing data approximation analysis using low power circuitry | Physics | 3 | Active |
| US10659258B1 | Matching transmitter impedance to receiver termination using an average of transmitter output voltage samples | Electricity | 2 | Active |
| US10671348B2 | Charge-scaling multiplier circuit with dual scaled capacitor sets | Electricity | 1 | Active |
| US7206236B1 | Array redundancy supporting multiple independent repairs | Physics | 1 | Expired |
| US10348320B1 | Charge-scaling adder circuit | Physics | 1 | Active |
| US10592209B1 | Charge-scaling multiplier circuit | Electricity | 1 | Active |
| US10658993B2 | Charge-scaling multiplier circuit with digital-to-analog converter | Electricity | 1 | Active |
| US11695424B2 | Distortion reduction circuit | Electricity | 0 | Active |
| US10663502B2 | Real time cognitive monitoring of correlations between variables | Physics | 0 | Active |
| US11551101B2 | Real time cognitive reasoning using a circuit with varying confidence level alerts | Physics | 0 | Active |
| US11990949B2 | Radio frequency signal integrity verification | Physics | 0 | Active |
| US7400550B2 | Delay mechanism for unbalanced read/write paths in domino SRAM arrays | Physics | 0 | Active |
| US12322912B2 | Plug count limiter for cables | Electricity | 0 | Active |
| US10670642B2 | Real time cognitive monitoring of correlations between variables | Physics | 0 | Active |
| US10367520B1 | Charge-scaling subtractor circuit | Physics | 0 | Active |
| US10566987B2 | Charge-scaling subtractor circuit | Physics | 0 | Active |
| US11526768B2 | Real time cognitive reasoning using a circuit with varying confidence level alerts | Physics | 0 | Active |
| US10802062B2 | Cognitive analysis using applied analog circuits | Physics | 0 | Active |
| US10587282B2 | Charge-scaling adder circuit | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.