Driving circuit that eliminates effects of ambient temperature variations and increases driving capacity
US7508242B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 1, 2007 |
| Grant date | Mar 24, 2009 |
| Priority date | — |
| Expiry date | Feb 1, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/04106
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In addition to two-stage CMOS inverters inverting and amplifying the input signal, a rising edge detector detects the rising edge of the input signal, and outputs a rising edge detection signal having a pulse width corresponding to ambient temperature, a PMOS drives the output node to the power supply potential according to the rising edge detection signal, a falling edge detector detects the falling edge of the input signal and outputs a falling edge detection signal having a pulse width corresponding to ambient temperature, and an NMOS drives the output node to ground potential according to the falling edge detection signal. When ambient temperature rises, and delay time of the inverters are thereby increased, pulse widths of the rising and falling edge detection signals are increased. The additional driving restrains delay time variation in a driving circuit due to ambient temperature change.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.