Low-power digital demodulator
US7508257B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 6, 2006 |
| Grant date | Mar 24, 2009 |
| Priority date | — |
| Expiry date | Feb 15, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B10/1141
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
Apparatus for demodulating a train of pulses includes a one-shot device having an asynchronous data input terminal, which is configured to receive the train of pulses, and a one-shot data output terminal. A first clocked logic gate has a first clocked data input terminal, which is coupled to the one-shot data output terminal, and a first clocked data output terminal. A combinatorial logic gate has combinatorial input terminals, which are coupled to the one-shot and first clocked data output terminals, and a combinatorial output terminal. A second clocked logic gate has a second clocked data input terminal, which is coupled to the combinatorial output terminal, and a second clocked data output terminal, which is configured to output a demodulated envelope of the train of pulses.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.