Non-homogeneous multi-processor system with shared memory
US7509457B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 24, 2005 |
| Grant date | Mar 24, 2009 |
| Priority date | — |
| Expiry date | Jun 10, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L67/34
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer architecture and programming model for high speed processing over broadband networks are provided. The architecture employs a consistent modular structure, a common computing module and uniform software cells. The common computing module includes a control processor, a plurality of processing units, a plurality of local memories from which the processing units process programs, a direct memory access controller and a shared main memory. A synchronized system and method for the coordinated reading and writing of data to and from the shared main memory by the processing units also are provided. A hardware sandbox structure is provided for security against the corruption of data among the programs being processed by the processing units. The uniform software cells contain both data and applications and are structured for processing by any of the processors of the network. Each software cell is uniquely identified on the network.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.