Method for wafer level packaging and fabricating cap structures
US7510947B2 · kind B2 · utility
2Cited by
5References
25Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 3, 2006 |
| Grant date | Mar 31, 2009 |
| Priority date | — |
| Expiry date | Nov 29, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/16235
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A cap wafer with patterned film formed thereon is etched through areas not covered by the patterned film to form a plurality of openings. Then, the cap wafer is bonded to a transparent wafer, and the cap wafer around the pattern film is segmented to form a plurality of cap structures. A device wafer with a plurality of devices and a plurality of contact pads electrically connected to the devices is subsequently provided. The cap structures and the device wafer are hermetically sealed to form a plurality of hermetic windows on the devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.