Thermal enhanced low profile package structure
US7511365B2 · kind B2 · utility
59Cited by
4References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 13, 2005 |
| Grant date | Mar 31, 2009 |
| Priority date | — |
| Expiry date | Dec 13, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/30107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A thermal enhanced low profile package structure and a method for fabricating the same are provided. The package structure typically includes a metallization layer with an electronic component thereon which is between two provided dielectric layers. The metallization layer as well as the electronic component is embedded and packaged while the substrates are laminated via a lamination process. The fabricated package structure performs not only a superior electric performance, but also an excellent enhancement in thermal dissipation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.