Memory and method for improving the reliability of a memory having a used memory region and an unused memory region
US7512023B2 · kind B2 · utility
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15References
10Claims
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Key dates
| Filing date | Sep 29, 2006 |
| Grant date | Mar 31, 2009 |
| Priority date | — |
| Expiry date | Sep 29, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/88
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for improving the reliability of a memory having a used memory region and an unused memory region, wherein defect memory elements in the used memory region can be substituted by functional memory elements in the unused memory region, having the steps of providing the used memory region with a first stress sequence; and providing the unused memory region with a second stress sequence.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.