Determining and analyzing integrated circuit yield and quality

US7512508B2 · kind B2 · utility

Inventors

• Janusz Rajski · West Linn, US
• Gang Chen · Sammamish, US
• Martin Keim · Möhrendorf, DE
• Nagesh Tamarapalli · Wilsonville, US
• Manish Sharma · Sunnyvale, US
• Huaxing Tang · Wilsonville, US

Key dates

• Filing date: Sep 6, 2005
• Grant date: Mar 31, 2009
• Expiry date: Feb 13, 2026

Classification

• Technology area (CPC G): Physics
• CPC primary: G01R31/2853
• WIPO field: Measurement
• WIPO sector: Instruments

Abstract

Methods, apparatus, and systems for computing and analyzing integrated circuit yield and quality are disclosed herein. For example, in one exemplary method disclosed herein information is received from processing test responses of integrated circuits designed for functional use in electronic devices. In this embodiment, the information is indicative of integrated circuit failures observed during testing of the integrated circuits and of possible yield limiting factors causing the integrated circuit failures. Probabilities that one or more of the possible yield limiting factors in the integrated circuits actually caused the integrated circuit failures are determined by statistically analyzing the received information. The probabilities that one or more possible yield limiting factors actually caused the integrated circuit failures are reported. Tangible computer-readable media comprising computer-executable instructions for causing a computer to perform any of the described methods are also disclosed.