Soft error handling in microprocessors
US7512772B2 · kind B2 · utility
26Cited by
13References
2Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 8, 2007 |
| Grant date | Mar 31, 2009 |
| Priority date | — |
| Expiry date | Sep 15, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1405
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for low cost handling of soft error in a microprocessor system is described, which includes detecting a soft error, indicating a register having soft error to an instruction unit, flushing microprocessor pipelines, identifying locations from which to recover a good architectural state based on execution resources used for processing, and recovering the good architectural state from duplicate execution resources used for processing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.