Method for making a semiconductor device including shallow trench isolation (STI) regions with a superlattice therebetween
US7514328B2 · kind B2 · utility
120Cited by
53References
20Claims
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Key dates
| Filing date | Jun 20, 2006 |
| Grant date | Apr 7, 2009 |
| Priority date | — |
| Expiry date | Oct 29, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/0227
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A method for making a semiconductor device may include forming a plurality of shallow trench isolation (STI) regions in a semiconductor substrate. Further, a plurality of layers may be deposited over the substrate to define respective superlattices over the substrate between adjacent STI regions and to define respective non-monocrystalline regions over the STI regions. The method may further include selectively removing at least portions of the non-monocrystalline regions using at least one active area (AA) mask.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.