Fan out type wafer level package structure and method of the same
US7514767B2 · kind B2 · utility
33Cited by
17References
18Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jul 7, 2006 |
| Grant date | Apr 7, 2009 |
| Priority date | — |
| Expiry date | Jul 7, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19105
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
To pick and place standard dice on a new base for obtaining an appropriate and wider distance between dice than the original distance of dice on a wafer. The package structure has a larger size of balls array than the size of the die by fan out type wafer level package. Moreover, the die may be packaged with passive components or other dice with a side by side structure or a stacking structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.