Structured integrated circuit device
US7514959B2 · kind B2 · utility
192Cited by
11References
2Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 17, 2006 |
| Grant date | Apr 7, 2009 |
| Priority date | — |
| Expiry date | Mar 31, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/17796
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A configurable logic array may include: a multiplicity of logic cells, containing look-up tables; customizable metal and via connection layers overlying the multiplicity of logic cells; a multiplicity of device customizable I/O cells; a multiplicity of configuration customizable RAM blocks; a ROM block with customizable contents; and a microprocessor with customizable I/O for configuring and testing the array, where the customizations are all done on a single via layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.