Patent · US Active

BIST to provide jitter data and associated methods of operation

US7516380B2 · kind B2 · utility

2Cited by

18References

23Claims

0Family size

Assignee

Intel Corporation · US

Inventors

Ofir Kanter · Haifa, IL
Eran Peleg · Mazkeret Batya, IL

Key dates

Filing date	Jun 28, 2005
Grant date	Apr 7, 2009
Priority date	—
Expiry date	Nov 18, 2026

Classification

Technology area (CPC G)Physics
CPC primaryG01R29/26
WIPO fieldMeasurement
WIPO sectorInstruments

Abstract

In an embodiment, a transmitter circuit is in an integrated circuit die with a test latch, and the test latch is enabled by a test clock signal to under-sample the transmit signal from the transmitter circuit. In a method of operation, a transmit signal is generated in an integrated circuit die, and the transmit signal is under-sampled in a test latch in the integrated circuit triggered by a test clock signal. Output data from the test latch is transmitted to a test device that is separated from the integrated circuit die.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.