Nitride semiconductor substrate and semiconductor element built thereon
US7518154B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 15, 2004 |
| Grant date | Apr 14, 2009 |
| Priority date | — |
| Expiry date | Jan 4, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8503
Abstract
A substrate system of the kind having a buffer region interposed between a silicon substrate proper and a nitride semiconductor region in order to make up for a difference in linear expansion coefficient therebetween. Electrodes are formed on the nitride semiconductor layer or layers in order to provide HEMTs or MESFETs. The buffer region is a lamination of a multiplicity of buffer layers each comprising a first, a second, and a third buffer sublayer of nitride semiconductors, in that order from the silicon substrate proper toward the nitride semiconductor region. The three sublayers of each buffer layer contain aluminum in varying proportions including zero. The aluminum proportion of the third buffer sublayer is either zero or intermediate that of the first buffer sublayer and that of the second. The low aluminum proportion of the third buffer sublayer serves to prevent two-dimensional electron gas from generating in the buffer region and hence to make this region sufficiently high in resistance to inhibit current leakage from the HEMTs or MESFETs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.