Data receiving apparatus using semi-dual reference voltage
US7518411B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 11, 2007 |
| Grant date | Apr 14, 2009 |
| Priority date | — |
| Expiry date | Sep 30, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/0292
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A semi-dual reference voltage data receiving apparatus includes a first input buffer, a second input buffer, and a phase detector wherein the first input buffer includes a first input receiving unit, a first sense amplifier, and a first current offset controlling unit. The first sense amplifier senses and amplifies the voltage difference between the voltage of a first terminal of a first input transistor and the voltage of a first terminal of a second input transistor. The first current offset controlling unit controls the offset of the current that flows through the second terminal of the second input transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.