Ferroelectric semiconductor memory device and method for reading the same
US7518901B2 · kind B2 · utility
3Cited by
9References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 24, 2007 |
| Grant date | Apr 14, 2009 |
| Priority date | — |
| Expiry date | Oct 31, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/22
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A first ferroelectric memory cell and a second ferroelectric memory cell each include a ferroelectric capacitor and a transistor and each store one set of information. A word-line is shared by the first and second ferroelectric memory cells. A first plate line is connected to the first ferroelectric memory cell and a second plate line is connected to the second ferroelectric memory cell. A selection transistor has one end connected to the first and second ferroelectric memory cells and the other end connected to a bit-line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.