Combined command and response on-chip data interface for a computer system chipset
US7519755B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 14, 2004 |
| Grant date | Apr 14, 2009 |
| Priority date | — |
| Expiry date | Jun 15, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4273
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit chip, particularly a southbridge, is provided that has a first and a second circuit unit. Each circuit unit can send requests to the other one and send back a response when receiving a request that requires a response. The first circuit unit is connected to the second circuit unit to send to the second circuit unit request data relating to a request to be sent by the first circuit unit and response data relating to a response to be sent by the first circuit unit over a shared signal line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.