Method of forming a semiconductor structure using a non-oxygen chalcogen passivation treatment
US7521376B2 · kind B2 · utility
8Cited by
1References
9Claims
0Family size
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Key dates
| Filing date | Oct 26, 2005 |
| Grant date | Apr 21, 2009 |
| Priority date | — |
| Expiry date | Feb 23, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/047
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method and structure in which Ge-based semiconductor devices such as FETs and MOS capacitors can be obtained are provided. Specifically, the present invention provides a method of forming a semiconductor device including a stack including a dielectric layer and a conductive material located on and/or within a Ge-containing material (layer or wafer) in which the surface thereof is non-oxygen chalcogen rich. By providing a non-oxygen chalcogen rich interface, the formation of undesirable interfacial compounds during and after dielectric growth is suppressed and interfacial traps are reduced in density.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.