Semiconductor device having a chip stack on a rewiring plate
US7521809B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 3, 2005 |
| Grant date | Apr 21, 2009 |
| Priority date | — |
| Expiry date | Feb 3, 2025 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P70/50
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device having a semiconductor chip stack on a rewiring plate is disclosed. In one embodiment, the device includes an external contact area having a plurality of external contact area regions which are physically separate from one another is arranged on the underside. The individual external contact area regions are assigned to the individual semiconductor chips in the semiconductor chip stack. The external contact regions of an individual external contact area have a common external contact which electrically connects the external contact area regions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.