Translational phase locked loop using a quantized interpolated edge timed synthesizer
US7521974B2 · kind B2 · utility
4Cited by
11References
15Claims
0Family size
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Key dates
| Filing date | May 31, 2006 |
| Grant date | Apr 21, 2009 |
| Priority date | — |
| Expiry date | Jul 24, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/025
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A direct digital synthesizer (DDS) such as a Quantized Interpolated Edge Timed (QuIET) synthesizer is implemented in the feedback path of a translational Phase Lock Loop (PLL). The frequency translation introduced by the synthesizer reduces the amplification of reference feedback path noise sources, thereby enabling a wider loop bandwidth and improving high-pass filtering of phase noise without the addition of a second PLL.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.