Ultra-low power crystal oscillator
US7522010B2 · kind B2 · utility
6Cited by
5References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 30, 2007 |
| Grant date | Apr 21, 2009 |
| Priority date | — |
| Expiry date | Jul 9, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03B2200/0082
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An ultra-low power crystal oscillator architecture that draws less than 2 μA during steady state operation. An amplifier stage is self biased and has input and output clamp circuits that limit its signal swing. Circuit values are selected such that there is sufficient transient load current for the first amplifier stage to oscillate, while at the same time the input and output clamp circuits maintain a sufficiently low swing of the stage such that the steady state average load current is on the order of less than 1 μA.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.