Semiconductor device with capacitively coupled field plate
US7525178B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 25, 2006 |
| Grant date | Apr 28, 2009 |
| Priority date | — |
| Expiry date | May 26, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
Abstract
A termination region of a semiconductor die is provided, which includes one or more field rings arranged in the termination region, one or more metal field plates, and an insulation layer disposed to prevent direct electrical contact between the field rings and the field plate such that the at least one field ring is capacitively coupled with the at least one field plate. Such a termination region may also include a polysilicon plate capacitively coupled with a diffusion region laterally spaced from the field rings, the polysilicon plate being located at an outer surface or directly under a passivation layer at an outer surface of the die. The termination region may also include floating field rings. The insulation layer may be a field oxide layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.