Semiconductor device package having multi-chips with side-by-side configuration and method of the same
US7525185B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 19, 2007 |
| Grant date | Apr 28, 2009 |
| Priority date | — |
| Expiry date | Jun 8, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/30107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention provides a semiconductor device package having multi-chips with side-by-side configuration comprising a substrate with die receiving through holes, connecting through holes structure and first contact pads on an upper surface and second contact pads on a lower surface of the substrate. A first die having first bonding pads and a second die having second bonding pads are respectively disposed within the die receiving through holes. The first adhesion material is formed under the first and second die and the substrate, and the second adhesion material is filled in the gap between the first and second die and sidewall of the die receiving though holes of the substrate. Further, bonding wires are formed to couple between the first bonding pads and the first contact pads, between the second bonding pads and the first contact pads. A dielectric layer is formed on the bonding wires, the first and second die and the substrate. A build up layer is form on the lower surface of substrate and the back side of first and second die.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.