Patent · US Expired

Parallel multithread processor (PMT) with split contexts

US7526636B2 · kind B2 · utility

5Cited by

5References

32Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Lajos Gazsi · Düsseldorf, DE
Jinan Lin · Ottobrunn, DE
Soenke Mehrgardt · Teningen, DE
Xiaoning Nie · Birkenfeld, DE

Key dates

Filing date	Nov 12, 2004
Grant date	Apr 28, 2009
Priority date	—
Expiry date	May 16, 2025

Classification

Technology area (CPC G)Physics
CPC primaryG06F9/3851
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

The present invention relates to a parallel multithread processor (1) with split contexts, with M parallel-connected standard processor root units (2) being provided for instruction execution of program instructions for different threads (T), and with N context memories (3) being provided, which each temporarily store a current state of a thread (T), and with a thread monitoring unit (4) being provided, by means of which each standard processor root unit (2) can be connected to each context memory (3). The invention accordingly provides a processor architecture in which a number N of different context memories (3) and corresponding threads (T) are effectively fully networked with a number M of standard processor root units (2). This means that use is made not only of paralleling of the standard processor root units (2), but also of the threads (T) and of the context memories (3).

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.