Super anneal for process induced strain modulation
US7528028B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 8, 2005 |
| Grant date | May 5, 2009 |
| Priority date | — |
| Expiry date | Aug 3, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/0227
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming a semiconductor structure includes providing a substrate, forming a first device region on the substrate, forming a stressor layer overlying the first device region, and super annealing the stressor layer in the first device region, preferably by exposing the substrate to a high-energy radiance source, so that the stressor layer is super annealed for a substantially short duration. Preferably, the method further includes masking a second device region on the substrate while the first device region is super annealed. Alternatively, after the stressor layer in the first region is annealed, the stressor layer in the second device region is super annealed. A semiconductor structure formed using the method has different strains in the first and second device regions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.