Patent · US Active

Integrated circuit arrangement and method

US7529999B2 · kind B2 · utility

3Cited by

3References

21Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Marcus Janke · Munich, DE
Dirk Rabe · Munich, DE
Steffen Sonnekalb · Munich, DE

Key dates

Filing date	Sep 8, 2006
Grant date	May 5, 2009
Priority date	—
Expiry date	Aug 24, 2027

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/0002
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

An integrated circuit arrangement including at least one circuit part which is designed to run through a functional self test and to output test results of the functional self test, and a testing unit, which is coupled to an input and an output and which is coupled to the at least one circuit part via testing lines. The testing unit is designed to start the functional self test when a starting signal for the functional self test is applied to the input, to evaluate test results that are present to determine whether they have a predefined relationship with predefined values, and to output data indicating the test result at the output. The testing unit is also designed to start the functional self test by internal circuit means and to evaluate the test results present.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.