Method of manufacturing integrated circuit device including recessed channel transistor
US7531414B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 13, 2007 |
| Grant date | May 12, 2009 |
| Priority date | — |
| Expiry date | Dec 13, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/027
Abstract
A method according to some embodiments of the invention includes defining an active region by forming a trench device isolation region on an integrated substrate, forming a mask pattern that exposes a channel sub-region of the active region and the trench device isolation region adjacent to the channel sub-region, etching the trench device isolation region, which is exposed by the mask pattern, to be recessed to a first depth using the mask pattern as an etch mask, etching the channel sub-region to form a gate trench having a second depth that is deeper than the first depth using the mask pattern as an etch mask, and forming a recess gate that fills the gate trench.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.