Semiconductor device including a memory cell with a negative differential resistance (NDR) device
US7531850B2 · kind B2 · utility
106Cited by
44References
24Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | May 30, 2006 |
| Grant date | May 12, 2009 |
| Priority date | — |
| Expiry date | Nov 30, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8162
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A semiconductor device may include at least one memory cell comprising a negative differential resistance (NDR) device and a control gate coupled thereto. The NDR device may include a superlattice including a plurality of stacked groups of layers, with each group of layers of the superlattice including a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.