Calibration device for a phased locked loop synthesiser
US7532696B2 · kind B2 · utility
2Cited by
12References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 18, 2004 |
| Grant date | May 12, 2009 |
| Priority date | — |
| Expiry date | Aug 26, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03C3/0933
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A calibration device for a phase locked loop arranged to generate an output frequency based upon a first frequency range of an input signal applied to a first input and a second frequency range of the input signal applied to a second input, the calibration phase locked loop synthesizer device comprising an estimator arranged to use a two dimensional estimation algorithm with a signal value indicative of a mismatch between the first input path and the second input path to determine an estimate of the mismatch to allow matching of the first input path and the second input path.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.