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US7534722B2 · kind B2 · utility
Inventor
Key dates
| Filing date | Jan 10, 2006 |
| Grant date | May 19, 2009 |
| Priority date | — |
| Expiry date | Feb 1, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3025
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method performed on a semiconductor chip having a doped semiconductor material abutting a substrate involves creating a first via through at least a portion of the substrate extending from an outer side of the substrate towards the doped semiconductor material, the first via having a wall surface and a bottom, introducing a first electrically conductive material into the first via so as to create an electrically conductive path, creating a second via, aligned with the first via, extending from an outer surface of the doped portion of the semiconductor chip to the bottom, and introducing a second electrically conductive material into the second via so as to create an electrically conductive path.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.