Reading multi-cell memory devices utilizing complementary bit information
US7535767B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 6, 2007 |
| Grant date | May 19, 2009 |
| Priority date | — |
| Expiry date | Dec 11, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5634
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Providing differentiation between overlapping memory cell bits in multi-cell memory devices is described herein. By way of example, select groups of memory cells of the multi-cell memory devices can be iteratively disabled to render state distributions of remaining, non-disabled memory cells, non-overlapped. System components can measure distributions rendered non-overlapped to uniquely identify states of such distributions. Identified state distributions can subsequently be disabled to render other state distributions non-overlapped, and therefore identifiable. In such a manner, read errors associated with overlapped bit states of multi-cell memory devices can be mitigated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.