Post-attachment chip-to-chip connection
US7538033B2 · kind B2 · utility
Inventor
Key dates
| Filing date | Jan 10, 2006 |
| Grant date | May 26, 2009 |
| Priority date | — |
| Expiry date | Jan 10, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01S2301/176
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming an electrical connection from a first chip, having a contact pad exposed through an opening in cover glass on the chip, to a second chip having a first side and a second side and involves attaching the second chip to the first chip, etching an annular via having an inner and outer perimeter, the inner perimeter corresponding to an outer perimeter of the contact pad, the annular via extending into and through the second chip and down to the cover glass such that the annular via's inner perimeter substantially corresponds to the contact pad's outer perimeter, filling the annular via with an insulator, removing semiconductor material of the second chip within the inner perimeter of the insulator to create a void extending from the second side to the contact pad, and filling at least some of the void with a conductive material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.