CMOS image sensor integrated with 1-T SRAM and fabrication method thereof
US7538371B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 1, 2005 |
| Grant date | May 26, 2009 |
| Priority date | — |
| Expiry date | Nov 15, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/18
Abstract
A CMOS image sensor integrated with 1T-SRAM is provided on a substrate having a pixel array part, a logic circuit part, and a memory part by adding only one photoresist process. There are a plurality of CMOS image sensor devices in the pixel array part, a logic circuit in the logic circuit part, and a plurality of 1T-SRAMs in the memory part, and each part is isolated by a plurality of STI regions. The 1T-SRAM includes a capacitor structure and a transistor. The capacitor structure includes a well region as a bottom capacitor plate, a capacitor dielectric layer, and a top capacitor plate formed on the substrate respectively. The transistor includes a gate dielectric layer, a gate, a drain, and a source continuous with and electrically connected to the well region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.