Semiconductor device with PMOS and NMOS transistors
US7538390B2 · kind B2 · utility
15Cited by
3References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 30, 2005 |
| Grant date | May 26, 2009 |
| Priority date | — |
| Expiry date | Oct 27, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6741
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device including an NMOS region and a PMOS region in the same substrate, wherein the semiconductor device includes a strained Si layer which is provided on the substrate in the NMOS region and in which the surface has a plane orientation different from that of the substrate, and a strained SiGe layer which is provided on the substrate in the PMOS region and which is composed of a stained layer having the same plane orientation as that of the surface of the substrate; and a method of manufacturing the same.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.