Inventor · Slingerlands, NY, US

Junli Wang

437Patents
18h-index
130Co-inventors
89Inventor score

Filing activity: Oct 31, 1997 → Sep 25, 2023

Most-cited inventions

PatentTitleAreaCited byStatus
US8492228B1 Field effect transistor devices having thick gate dielectric layers and thin gate dielectric layers Electricity 61 Active
US9954058B1 Self-aligned air gap spacer for nanosheet CMOS devices Electricity 47 Active
US9508825B1 Method and structure for forming gate contact above active area with trench silicide Electricity 38 Active
US10566246B1 Shared contact trench comprising dual silicide layers and dual epitaxial layers for source/drain layers of NFET and PFET devices Electricity 29 Active
US10103065B1 Gate metal patterning for tight pitch applications Electricity 29 Active
US9735246B1 Air-gap top spacer and self-aligned metal gate for vertical fets Electricity 28 Active
US9666533B1 Airgap formation between source/drain contacts and gates Electricity 28 Active
US9805935B2 Bottom source/drain silicidation for vertical field-effect transistor (FET) Electricity 27 Active
US9490335B1 Extra gate device for nanosheet Emerging Cross-Sectional Technologies 27 Active
US9799765B1 Formation of a bottom source-drain for vertical field-effect transistors Electricity 25 Active
US9748380B1 Vertical transistor including a bottom source/drain region, a gate structure, and an air gap formed between the bottom source/drain region and the gate structure Physics 25 Active
US10020254B1 Integration of super via structure in BEOL Electricity 25 Active
US8857209B2 Apparatus for carrying/storing baked goods and the like Performing Operations; Transporting 22 Active
US9741792B2 Bulk nanosheet with dielectric isolation Electricity 22 Active
US9842931B1 Self-aligned shallow trench isolation and doping for vertical fin transistors Electricity 21 Active
US8546209B1 Replacement metal gate processing with reduced interlevel dielectric layer etch rate Electricity 20 Active
US9576980B1 FinFET devices having gate dielectric structures with different thicknesses on same semiconductor structure Electricity 19 Active
US9768118B1 Contact having self-aligned air gap spacers Electricity 19 Active
US10020255B1 Integration of super via structure in BEOL Electricity 18 Active
US9704990B1 Vertical FET with strained channel Electricity 16 Active
US9653575B1 Vertical transistor with a body contact for back-biasing Electricity 16 Active
US9276013B1 Integrated formation of Si and SiGe fins Electricity 16 Active
US9911738B1 Vertical-transport field-effect transistors with a damascene gate strap Electricity 15 Active
US9570555B1 Source and drain epitaxial semiconductor material integration for high voltage semiconductor devices Electricity 15 Active
US7538390B2 Semiconductor device with PMOS and NMOS transistors Electricity 15 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.