BIST to provide phase interpolator data and associated methods of operation
US7539916B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 28, 2005 |
| Grant date | May 26, 2009 |
| Priority date | — |
| Expiry date | Jan 7, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/90
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
In an embodiment, a phase interpolator (PI) circuit is in an integrated circuit with a test latch, and the test latch is enabled by a test clock signal to under-sample the PI output clock signal from the signal source. In a method of operation, a PI output clock signal is generated in an integrated circuit, and the PI output clock signal is under-sampled in a test latch in the integrated circuit triggered by a test clock signal. Output data from the test latch is transmitted to a test device that is separated from the integrated circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.