Method of forming a device package having edge interconnect pad
US7541209B2 · kind B2 · utility
1Cited by
7References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 14, 2005 |
| Grant date | Jun 2, 2009 |
| Priority date | — |
| Expiry date | Feb 9, 2027 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P70/50
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method of forming a device package having an edge interconnect pad includes forming an array of MEMS devices overlaying at least one conductive via that electrically connects to an underlying layer. The method continues with depositing, by way of a damascene process, a conductive material on a substrate that is coplanar with the array of MEMS devices, the conductive material coupling to the at least one conductive via. The method also includes covering the array of MEMS devices and the conductive material with a passivation layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.